Prashant Pradhan

43, Davenport Ave, Apt MD,
New Rochelle, NY 10805
Email: ppradhan@us.ibm.com
URL : http://www.ecsl.cs.sunysb.edu/~prashant
 

Education

  • Ph.D. in Computer Science, State University of New York, Stony Brook, 2001
  • M.S. in Computer Science, State University of New York, Stony Brook, 1998
  • B.Tech. in Computer Science and Engineering, Indian Institute of Technology, Delhi, 1996 

 

Awards

  • IBM Research First Plateau Invention Achievement Award, awarded 2003
  • Catacosinos Graduate Fellowship, 2000, State University of New York, Stony Brook.
  • Symbol Graduate Fellowship, 1998, State University of New York, Stony Brook.
  • Three merit awards for outstanding academic performance at IIT Delhi.

 

Professional Experience

 

  • Research Staff Member, IBM Thomas J. Watson Research Center, Hawthorne, NY (2001-Present)

Technical lead in various research projects involving multi-resource scheduling, server performance modeling, application performance tomography and network resource management, with impact on IBM products and services.

  • Co-op student, IBM Thomas J. Watson Research Center, Hawthorne, NY (1998-2000)

Research in the design and implementation of a content-aware (layer 5) switch, and quantification of its performance benefits for clusters of HTTP and SSL servers.

  • Research Assistant, Experimental Computer Systems Lab, Department of Computer Science, State University of New York, Stony Brook (1996-2001)

Conducted research in the area of network classification and scheduling algorithms, scalable cluster-based system design, design of safely extensible operating systems, and design and quantification of network-resident performance optimizations for key network applications. This work led to the dissertation “Addressing the Challenges of High-Performance, Safely Extensible Router Design”.

  • Instructor, CSE220 : Computer Architecture, State University of New York, Stony Brook (Summer 1999)
  • Summer Intern, Silicon Graphics Inc., Mountain View, CA (Summer 1997)

Designed and implemented a language and compiler to specify and execute distributed tests on a cluster to verify correctness of group communication consistency protocols.

 

Professional Activities

 

  • Executive Committee Member

 

TPC Chair, IEEE CCW 2004.

 

  • Program Committee Member

 

ICNP 2005.

ACM Multimedia 2001.

  • Graduate Student Mentor

 

Mentored Abhishek Chandra, PhD candidate, UMass Amherst.

Mentored Wen Xu, PhD candidate, Princeton University.

Mentored and serving on the PhD thesis committee of Manpreet Singh, PhD candidate, Cornell University.

  • Reviewer for numerous conferences like IEEE INFOCOM, IEEE JSAC, Journal of Parallel and Distributed Computing, SPIE MMCN, IMC.

 

Invited Lectures

 

  • Panels

o       Invited panelist, “Compilation challenges in network processors”, panel at the ACM SIGPLAN Conference on Languages, Compilers and Tools for Embedded Systems (LCTES), June 2003, San Diego, CA.

  • Talks
    • “Computing is too Complicated”, Invited talk on Autonomic Computing at the Rotary club Elmsford, NY chapter.
    • “A Scalable Architecture for High Performance, Safely Extensible Routers”, Dept. of Electronics and Communication Engineering, Indian Institute of Science, Bangalore, India, July 2000.
    • “A Scalable Architecture for High Performance, Safely Extensible Routers”, IBM India Research Lab, New Delhi, India, July 2000.
    • “An Architecture for High Performance Programmable Routers and its Applications”, XStream Logic Inc., Los Gatos, CA, September 2000.

 

Books and Book Chapters

 

  • “Creating and Deploying Network Applications : A Designer’s Guide” (with Debanjan Saha and Tzi-cker Chiueh), to be published by Addison-Wesley
  • “Efficient and Faithful Performance Modeling of Network Processor-Based System Designs” (with Wen Xu, Indira Nair and Sambit Sahu), chapter in “Network Processor Design : Issues and Practices” Volume 2, published by Morgan Kaufmann.

 

Journal Papers

  • With T.Chiueh, “Cache Memory Design for Internet Processors”, Invited Paper, IEEE MICRO, Vol 20, No. 1, Jan/Feb 2000.
  • With D.Saha, V.Peris and G.Apoustolopoulos, “Securing Electronic Commerce : Reducing the SSL Overhead”, IEEE Network, Vol 14, No. 4, July/August 2000.

 

Conference Papers

 

·        With Wen Xu, Indira Nair and Sambit Sahu, ” Efficient and Faithful Performance Modeling of Network Processor-Based System Designs”, in Proceedings of NP-2 2003.

·        With A. Chandra, R. Tewari, P. Shenoy and S. Sahu, “An Observation-based Approach to Self-Managing Web Servers”, in Proceedings of IWQoS 2002.

·        With T.Chiueh, “Implementation and Evaluation of a QoS-capable, cluster-based IP router”, in Proceedings of SuperComputing 2002.

·        With T. Chiueh and K. Gopalan, “Design Issues in System Support for Programmable Routers”, in proceedings of the Eighth IEEE Workshop on Hot Topics in Operating Systems (HotOS-VIII), Schloss Elmau, Germany, May 2001.

·        With T. Chiueh and K. Gopalan, “Integrated Scheduling of Multiple Resources in Shared Network Servers”, in proceedings of the First NY Metro Area Networking Workshop, IBM T.J. Watson Research Center, Hawthorne, NY, March 2001.

·        With T.Chiueh and A.Neogi, Aggregate TCP Congestion Control Using Multiple Network Probing , in proceedings of the 20th International Conference on Distributed Computing Systems, 2000.

·        With T.Chiueh, Suez : A Scalable Real-Time Packet Router , in proceedings of the 20th International Conference on Distributed Computing Systems, 2000.

·        With D.Saha, V.Peris and G.Apoustolopoulos, Design, Implementation and Performance of a Content-Based Switch, in proceedings of IEEE INFOCOM, 2000.

·        With T.Chiueh, Cache Memory Design for Network Processors, in proceedings of the 6th IEEE Symposium on High Performance Computer Architecture, 2000.

·        With T.Chiueh and G.Venkitachalam, Integrating Segmentation and Paging Protection for Safe, Efficient and Transparent Software Extensions , in proceedings of the 17th ACM Symposium on Operating Systems Principles, 1999.

·        With T.Chiueh, High Performance IP Routing Table Lookup using CPU Caching, in proceedings of IEEE INFOCOM, 1999.

·        With T.Chiueh, Real-Time Performance Guarantees over Wired/Wireless LANs , in proceedings of the 4th IEEE Real-time Technology and Applications Symposium, 1998.

·        With T.Chiueh and Praveen Arora, The Design and Implementation of a Packet-switched Phone Server , in proceedings of the IEEE International Conference on Parallel and Distributed Systems, 1998.

·        With T.Chiueh and A.Ballman, Distributed System Support for Network-Based Multi-User Interactive Applications , in proceedings of the 1st DARPA Distributed Simulation Symposium, 1997.

·        With T.Chiueh, Intra-address space protection using segmentation hardware, in proceedings of the 7th IEEE Workshop on Hot Topics in Operating Systems.

·        With T.Chiueh, Operating Systems Support for Programmable Cluster-Based Internet Routers , in proceedings of the 7th IEEE Workshop on Hot Topics in Operating Systems.

 

Technical Reports

 

·        With Manpreet Singh, “The Case for Aggregate Congestion Management in Internet Servers”, in preparation, for submission to ACM SIGCOMM 2004.

·        With Daniel Villela and Dan Rubenstein, “Server Provisioning in the Application Serving tier for e-Commerce Servers”, submitted for publication to ACM SIGMETRICS 2004.

·        With Erich Nahum,  John Tracey,  Douglas Freimuth, Elbert Hu, Ronald Mraz and Sambit Sahu, “Server Scalability and TCP offload”.

 

Patents Pending

 

·        “Method and apparatus for network communication card memory management.” Co-inventors: Tracey, J.M.  Mraz, R.  Nahum, E.M.  Freimuth D.  Sahu, S.

·        “Method and apparatus for support of bottleneck avoidance in an intelligent adapter.” Co-inventors: Tracey, J.M.  Mraz, R.  Nahum, E.M.  Freimuth D.  Sahu, S.

·        “State recovery of failover of intelligent network adapters.” Co-inventors: Tracey, J.M.  Mraz, R.  Nahum, E.M.  Freimuth D.  Sahu, S.

·        “Differentiated handling of SIP messages for VoIP call control.” Co-inventors: Acharya A., Pradhan P., Kandlur D.

·        “Method and Apparatus for Supporting Offload of Server Network Protocol Processing to an Intelligent Interface.” Co-inventors: Tracey, J.M.  Mraz, R.  Nahum, E.M.  Freimuth D.  Sahu, S.

·        “An Architecture for Adaptive Admission Control and Resource Management for Service Time Guarantees.” Co-inventors: Freimuth D., Sahu S., Tewari R., Dillenberger D.

·        “Server-Based Performance Management of Network Flows.” Co-inventors: Singh M., Dillenberger D.

 

References 

 

Available upon request